Logic Gates

Logic Gates Combinational Circuits. By Groups C-2/C-3.

Logic Gates. A logic gate is an elementary building block of a digital circuit. Most logic gates have two input and one output. At any given moment, every terminal is in one of the two binary conditions low (0) or high (1), represented by different voltage levels. There are seven basic logic gates: AND, OR, XOR, NOT, NAND, NOR, and XNOR. 0 is called "false" and 1 is called "true,”.

AND Gate. The output is "true" when both inputs are "true." Otherwise, the output is "false.".

OR Gate. The OR gate gets its name from the fact that it behaves after the fashion of the logical inclusive "or." The output is "true" if either or both of the inputs are "true." If both inputs are "false," then the output is "false.“.

XOR Gate. The XOR ( exclusive-OR ) gate acts in the same way as the logical "either/or." The output is "true" if either, but not both, of the inputs are "true." The output is "false" if both inputs are "false" or if both inputs are "true.".

NOT Gate. logical inverter , sometimes called a NOT gate to differentiate it from other types of electronic inverter devices, has only one input. It reverses the logic state..

NAND Gate. The NAND gate operates as an AND gate followed by a NOT gate. It acts in the manner of the logical operation "and" followed by negation. The output is "false" if both inputs are "true." Otherwise, the output is "true.".

NOR Gate. The NOR gate is a combination OR gate followed by an inverter. Its output is "true" if both inputs are "false." Otherwise, the output is "false.".

XNOR Gate. The XNOR (exclusive-NOR) gate is a combination XOR gate followed by an inverter. Its output is "true" if the inputs are the same, and"false" if the inputs are different.

Combinational Circuits. Combinational circuit is circuit in which we combine the different gates in the circuit for example encoder, decoder, multiplexer and demultiplexer. Some of the characteristics of combinational circuits are following. The output of combinational circuit at any instant of time, depends only on the levels present at input terminals. The combinational circuit do not use any memory. The previous state of input does not have any effect on the present state of the circuit. A combinational circuit can have a n number of inputs and m number of outputs..

Using combinations of logic gates, complex operations can be performed. In theory, there is no limit to the number of gates that can be arrayed together in a single device. But in practice, there is a limit to the number of gates that can be packed into a given physical space. Arrays of logic gates are found in digital integrated circuits (ICs). As IC technology advances, the required physical volume for each individual logic gate decreases and digital devices of the same or smaller size become capable of performing ever-more-complicated operations at ever-increasing speeds..

Block Diagram.

Half Adder. Half adder is a combinational logic circuit with two input and two output. The half adder circuit is designed to add two single bit binary number A and B. It is the basic building block for addition of two single bit numbers. This circuit has two outputs carry and sum..

Half Adder. [image] Half Adder Circuit Diagram.

Full adder is developed to overcome the drawback of Half Adder circuit. It can add two one-bit numbers A and B, and carry c. The full adder is a three input and two output combinational circuit..

[image] Full Adder Circuit Diagram. Full Adder.

N-Bit Parallel Adder The Full Adder is capable of adding only two single digit binary number along with a carry input. But in practical we need to add binary numbers which are much longer than just one bit. To add two n-bit binary numbers we need to use the n-bit parallel adder. It uses a number of full adders in cascade. The carry output of the previous full adder is connected to carry input of the next full adder..

4 Bit Parallel Adder In the block diagram, A0 and B0 represent the LSB of the four bit words A and B. Hence Full Adder-0 is the lowest stage. Hence its Cin has been permanently made 0. The rest of the connections are exactly same as those of n-bit parallel adder is shown in fig. The four bit parallel adder is a very common logic circuit..

Half Subtractors Half subtractor is a combination circuit with two inputs and two outputs (difference and borrow). It produces the difference between the two binary bits at the input and also produces a output (Borrow) to indicate if a 1 has been borrowed. In the subtraction (A-B), A is called as Minuend bit and B is called as Subtrahend bit. Corrections to be done in images.

Full Subtractors The full subtractor is a combinational circuit with three inputs A,B,C and two output D and C'. A is the minuend, B is subtrahend, C is the borrow produced by the previous stage, D is the difference output and C' is the borrow output. The disadvantage of half subtractor about not considering the borrow of previous stage is overcome by full subtractor..

Full Subtractors.

N-Bit Parallel Subtractor The subtraction can be carried out by taking the 1's or 2's complement of the number to be subtracted. For example we can perform the subtraction (A-B) by adding either 1's or 2's complement of B to A. That means we can use a binary adder to perform the binary subtraction..

4 Bit Parallel Subtractor The number to be subtracted (B) is first passed through inverters to obtain its 1's complement The 4-bit adder then adds A and 2's complement of B to produce the subtraction. S3 S2 S1 S0 represent the result of binary subtraction (A-B) and carry output Cout represents the polarity of the result. If A > B then Cout =0 and the result is in the binary form (A-B) AND if A<B then Cout = 1 and the result is in the 2's complement form..

4 Bit Parallel SUBTRACTOR.

Multiplexers. It has n-data inputs, one output and m select inputs with 2m = n & is called n:1 multiplexer It is a digital circuit which selects one of the n data inputs and routes it to the output. Depending on the digital code applied at the selected inputs, one out of n data sources is selected and transmitted to the single output Y. E is called the strobe or enable input which is useful for the cascading and will perform the required operation only when it is low. For 10 data inputs to be multiplexed no. of select lines and type of multiplexer required will be……...

Multiplexers. [image] xnn. [image] Enable Select Output x = Don't care.

Demultiplexers. A demultiplexer performs the reverse operation of a multiplexer i.e. it receives one input and distributes it over one of the outputs. It has only one input, n outputs, m select input. At a time only one output line is selected by the select lines and the input is transmitted to the selected output line. Always 2m>n for a 1:n demultiplexer.

Demultiplexers. A 2:1 demultiplexer block diagram and truth table.

Decoder. A decoder is a combinational circuit having n input and to a maximum m = 2n outputs. i.e m (output count) > n (input count) Decoder is identical to a demultiplexer without any data input where select lines behave as a n inputs. It performs operations which are exactly opposite to those of an encoder..

2 to 4 Line Decoder. A and B are the two inputs where D through D are the four outputs. From Truth table it appears that each output is 1 for only a specific combination of inputs & all other outputs being zero.

2 to 4 Line Decoder. [image] Outputs. Logic circuit.

Encoder. It performs the inverse operation of the decoder An encoder has n number of input lines and m number of output lines. ( An encoder produces an m bit binary code corresponding to the digital input number. The encoder accepts an n input digital word and converts it into an m bit another digital word.

Priority Encoder. Here priority is given to the input lines. If two or more input lines are 1 at the same time, then the input line with highest priority will be considered. There are four input D0, D1, D2, D3 and two output Y0, Y1. Out of the four input D3 has the highest priority and D0 has the lowest priority. That means if D3 = 1 then Y1 Y0 = 11 irrespective of the other inputs. Similarly if D3 = 0 and D2= 1 then Y1 Y0 = 10 irrespective of the other inputs..

Priority Encoder. Highest Inputs Lowest Outputs. [image] Highest priority input D: Lowest priority input Priority Encoder.

Priority Encoder. [image] tata + ca='A. Y1= D3 + D2 Y0 = D3 + D1 ! D2.